Round Zero

Senior DFT Engineer

Department
Digital
Location
Sydney
Workplace
On-site
Seniority
Senior

The Senior DFT Engineer in Sydney is responsible for the full lifecycle of design-for-test features in wireless system-on-chips. This role includes defining DFT architecture, implementing scan chains, at-speed testing, low-power techniques, memory built-in self-tests, and supporting silicon bring-up and production. The engineer collaborates across design and test teams to optimize test quality, manage ATE constraints, and drive debugging and yield analysis during tapeout cycles.

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